Fast Fourier Transform

Brute-Force Search of Fast Convolution Algorithms1
Generating and Searching Families of FFT Algorithms
Generating and Searching Families of FFT Algorithms (SMT 2011 Presentation)

RTL Refactoring

Refactoring to Prepare RTL for Reuse
A SystemVerilog Rewriting System for RTL Abstraction with Pentium Case Study

Automata-Based Symbolic Scheduling

Automata-Based Symbolic Scheduling (Dissertation)
Symbolic NFA scheduling of a RISC microprocessor
Automata-Based Symbolic Scheduling for Looping DFGs
Representing and Scheduling Looping Behavior Symbolically
A Model for Scheduling Protocol-Constrained Components and Environments
Efficient Encoding for Exact Symbolic Automata-Based Scheduling


Arithmetic Structures for Inner-Product and Other Combinations Based on a Latency-Free Bit-Serial Multiplier Design
A Microcontroller Based Multimode Reader
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